Silex technology Embedded Intelligent Module SX-560 Especificaciones descargar pdf (Pagina 24)

Serial Peripheral Interface

The four SPI signals are accessible using the 26-pin I/O header JP3. The SPI MOSI, SPI MISO, and SPI

Clock signals are routed to both the JP3 header and an on-board temperature sensor. The temperature

sensor can be disabled by removing the jumper from the TSPICS signal on JP7 as described in the GPIO

Special Functions section above.

LCD Interface

A 16x2 LCD display is available as an option for the SX-560-6900 Evaluation Daughtercard. This LCD

can be controlled from either Serial Port 2 or via the SPI interface. The LCD display plugs into header

JP1. Header JP12 is used to select serial or SPI control (place a jumper on pins 1 and 2 to select serial,

or place the jumper on pins 2 and 3 to select SPI).

OEM Interface Electrical Characteristics

Table 12 OEM Signal Parameter Descriptions

Parameter

Symbol

Condition

Minimum

Maximum

Unit

Input high voltage

Vih

2.0▼

Volts

Input low voltage

Vil

0.8

Volts

Output high voltage

UART0_TXD, UART0_RTS,

UART1_TXD, UART1_RTS

UART2_TXD

Voh

Ioh = 4mA

2.4

Volts

Output low voltage

UART0_TXD, UART0_RTS,

UART1_TXD, UART1_RTS

UART2_TXD

Vol

Iol = 8mA

0.4

Volts

Output high voltage

GPIO 1 to 10, SPI, CS, SPI_SDO,

SPI_CLK, Reset_N

Voh

Ioh = 8mA

2.4

Volts

Output low voltage

GPIO 1 to 10, SPI, CS, SPI_SDO,

SPI_CLK, Reset_N

Vol

Iol = 8mA

0.4

Volts

Input Leakage Current

0 < Vin < 3.3v

-10

+10

A

1 2 ... 19 20 21 22 23 24 25 26 27 28 29 ... 103 104

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